ZGAD65S12C — Chip (PIN)
Part Number

ZGAD65S12C

ZGAD65S12C

Product Summary

ZGAD65S12C is a single-channel 12-bit 65Msps analog-to-digital converter (ADC), designed for high-frequency, wide dynamic range signal digitization, featuring excellent performance including 68dB Signal-to-Noise Ratio (SNR) and 85dB Spurious-Free Dynamic Range (SFDR) (SFDR).

Technical Specifications

• Sampling Rate 10Msps to 65Msps

• 1.8V Single Voltage Supply

• Output: CMOS

• Input Range: 2.0V pp

• Signal-to-Noise Ratio (SNR): 68dB

• Spurious-Free Dynamic Range (SFDR): 85dB

• Full Power Bandwidth: 260MHz

• Power Dissipation at Full Rate: 167mW

• Single-Channel Sampling

• Optional Clock Duty Cycle Stabilizer

• Power-Saving Low Power and Sleep Modes

• Configurable SPI Serial Port

• Package: QFN40

• Operating Temperature: -40°C to 85°C

Features & Benefits

ZGAD65S12C is a single-channel 12-bit 65Msps analog-to-digital converter (ADC).designed for high-frequency, wide dynamic range signal digitization.The family features performance including 68dB signal-to-noise ratio (SNR) and 85dB spurious-free dynamic range (SFDR), making it perfect for demanding signal chain applications.260MHz input bandwidth allows the ADC to maintain excellent performance while sampling at high frequencies.The latency is only six clock cycles.Static specifications include ±0.8LSBIntegral Non-Linearity (INL) (typical), ±0.25LSBDifferential Non-Linearity (DNL) (DNL) (typical).The clock input can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS input.An optional clock duty-cycle stabilizer allows high performance at full-speed operation over a wide range of clock duty cycles.

Datasheets

PDFZGAD65S12C.pdf
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PDFApplication Notes_ZG-0099.pdf
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PDFApplication Notes_ZG-0100.pdf
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PDFApplication Notes_ZG-0101.pdf
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